ZH reported, according to China Daily on May 25.
Huawei Technologies is laying out an ambitious new semiconductor roadmap that seeks to push chip performance into territory comparable with the industry’s most advanced nodes — even as US export controls continue to restrict China’s access to cutting-edge manufacturing tools.
At a semiconductor conference in Shanghai, the company said it expects its high-end chips to reach performance equivalent to a “1.4-nanometer-class” process by 2031, based on a newly proposed design framework rather than traditional transistor shrinking.
The announcement signals a shift in how at least some Chinese chip designers are thinking about the future of semiconductor development: not purely in terms of physical miniaturization, but through architectural and system-level innovation.
Moving Beyond Traditional Scaling
Huawei’s approach departs from the long-established logic that has defined the semiconductor industry for decades — where performance gains largely depend on continuously shrinking transistor sizes.
Instead, the company is promoting what it calls the “Tau Scaling Law,” a framework focused on reducing signal transmission delays across chips and systems rather than simply scaling down components.
The idea reflects a growing recognition across the industry that traditional scaling is becoming increasingly difficult as physical and economic limits of semiconductor manufacturing intensify.
According to Huawei, the company has already designed and mass-produced 381 chips based on this framework over the past six years, spanning applications from mobile devices to artificial intelligence computing.
New Smartphone Chip Planned
As part of its roadmap, Huawei also said it will release a new Kirin smartphone chip this autumn.
The chip will reportedly use a multi-layer circuit architecture designed to shorten critical wiring paths, improving both energy efficiency and effective transistor density.
While details remain limited, the announcement suggests Huawei is continuing to invest heavily in in-house chip design capabilities despite ongoing restrictions on access to advanced semiconductor manufacturing equipment.
Sanctions and the Search for Alternative Paths
Huawei’s strategy comes against the backdrop of tightening US export controls on advanced semiconductor technologies, including restrictions on high-end lithography systems used to manufacture cutting-edge chips.
These constraints have made it extremely difficult for Chinese firms to access the most advanced production nodes through conventional fabrication methods.
As a result, companies like Huawei are increasingly exploring alternative approaches — including advanced chip architecture design, system integration improvements, and software-hardware co-optimization — to improve performance without relying solely on transistor scaling.
Industry analysts note that while China is unlikely to achieve leading-edge manufacturing parity through traditional fabrication alone in the near term, architectural innovation could help narrow the performance gap in specific application areas, particularly AI and mobile computing.
Competition in AI Chips Intensifies
The announcement also comes as competition in artificial intelligence hardware accelerates.
Chinese AI developers are increasingly integrating domestic chips into their systems. For example, in technical documentation, AI model developers such as DeepSeek have referenced Huawei’s Ascend neural processing units alongside Nvidia GPUs in hardware evaluation frameworks — an indication that domestic chips are gaining credibility in AI workloads.
Other firms are also exploring ways to reduce computing costs by optimizing inference systems around domestic hardware, further strengthening demand for local chip ecosystems.
A Long-Term Semiconductor Strategy
Huawei’s projection of “1.4nm-equivalent” performance places its roadmap in conceptual competition with leading global foundries such as TSMC, which is currently advancing toward next-generation manufacturing nodes.
However, unlike traditional chipmakers that rely on manufacturing process breakthroughs, Huawei’s strategy emphasizes system-level redesign as a parallel path to performance gains.
The company says collaboration will remain essential.
“No single company can solve all the challenges in semiconductors alone,” a Huawei executive said, adding that future progress will require cooperation among engineers, researchers and industry partners globally.
A Different Kind of Semiconductor Race
The broader significance of Huawei’s announcement goes beyond a single chip or product roadmap.
It reflects a structural shift in the global semiconductor industry — where geopolitical constraints, supply chain fragmentation and technological bottlenecks are pushing companies to rethink how chip performance is achieved.
While the leading edge of chip manufacturing remains dominated by a small number of global players, alternative innovation pathways are emerging alongside it.
Huawei’s “Tau Scaling” approach represents one such attempt to redefine the rules of competition in an industry that has long been defined by physical scaling limits.
Whether these new approaches can match the performance of traditional semiconductor manufacturing at scale remains an open question.
But the direction is clear: the race for the next generation of computing power is no longer only about shrinking chips — it is also about reinventing how they are designed.